verilog-generator — tool profile and history
Agent skill for Verilog-2001 RTL generation and FPGA design workflows.
- Language
- Python
- License
- Apache-2.0
- Created
- Last activity
- Topics
- agent-skill
- claude-skills
- codex-skills
- deepseek-harness-skills
- eda
- fpga
- gemini-skills
- hardware-generation
- rtl
- verilog
Install git clone https://github.com/Eriemon/verilog-generator ~/.claude/skills/verilog-generator
Current measurement
252GitHub stars+13 (+5.4 %)
measured growthMomentum uses available readings from the last 7 days: measured with at least two comparable readings, estimated otherwise.
Reading history
| Date | Value | Metric |
|---|---|---|
| 252 | GitHub stars | |
| 250 | GitHub stars | |
| 249 | GitHub stars | |
| 247 | GitHub stars | |
| 241 | GitHub stars | |
| 239 | GitHub stars |
Classifications
- Domains
- Type
- Agent skills
- Use cases
Neighbouring tools
These entries declare the same topics. No similarity is inferred: only the shared topics are stated.